The present invention relates to non-volatile memory systems and more particularly to a system that integrates hierarchically organized non-volatile memory with a programmable controller for performing operations on the non-volatile memory.
New multimedia applications for computers make great demands on system performance both in terms of processing power and memory capacity. For example, 1-D and 2-D Discrete Cosine Transforms and Inverse Discrete Cosine Transforms are necessary to implement JPEG and MPEG compression and decompression. Wavelet compression requires various digital filtering operations. Fractal compression potentially requires both filtering and extensive search operations. Image enhancement also requires digital filtering. All of these operations require extensive computations and/or comparisons to be performed on large amounts of data.
One solution is to simply assign these tasks to the CPU of a computer system. Multimedia performance will then be limited by the CPU speed as well as the speed of access to memory. If the computer system is running other tasks concurrently, these other tasks will also be performed slowly.
Another solution is to provide supplemental hardware. For example, a computer system may be equipped with an additional board including a digital signal processing circuit and memory, both dedicated to multimedia tasks. This approach, however, adds considerable expense and furthermore, the added memory duplicates resources already available within the computer system.
Similar problems are posed by system security. Controlling access to the computer and/or protecting the confidentially of data stored and/or transmitted by the computer requires that encryption and decryption be implemented. Encryption and decryption represent yet another potential drain on the computer's processing power. Furthermore, encryption and decryption key information are typically stored on the hard drive of the computer where they are difficult to protect.